Z turn board linux

Программирование SoC Zynq

В прошлой публикации я упомянул, что мой SBC для экспериментов пал смертью храбрых. Само собою, встала проблема нового подопытного.

Простой одноплатник мне как-то не хотелось приобретать, поэтому выбор мой пал на SoC’и. Выбирал я между Zynq и Cyclone V. По названию темы, думаю, догадались, что же я решил выбрать.

Данная публикация будет состоять из небольшого обзора платки с заглавной картинки и того, как «программировать» и «конфигурировать» подобное железо. Кому это интересно прошу под кат.

Board

100 GPIO pins. Из периферии есть LED, RGB LED, buzzer, inertial and temperature sensors.

Более подробное описание можете поглядеть по ссылке.

Отмечу, что если собираетесь использовать такой камень, то обязательно приобретайте для него радиатор и стойки для соответствующей платы. А если и этого не хватает, то привинтите туда ещё и вентилятор, т.к. этот зверь греется сильно.

Программирование

Собственно, программивать Zynq можно двумя путями: 1) как обычный MCU baremetal 2) из под OS.

Baremetal

В этом случае всё предельно просто: накидываете программку—>компилите—>заливаете JTAG’ом в камень. У этого камня 256 кБ флэша для прошивки. Т.к. JTAG отладчик я не приобретал, то показывать тут нечего =)

В моём случае на micro SD карточке сборка Линукса. Т.е. путь создания, проверки и отладки программ аналогичен описанному, в прошлой публикации.

Элементарщина: накидываете программку—>компилите toolchain’ом и копируюте на плату/компилите на плате/копируюте на плату скрипт—>отлаживаете/запускаете—>имеете профит!

Думаю, заострять на этом внимание не особо нужно, поэтому просто >:

Копируем наш файлик на борду:

Конфигурирование

А вот здесь заострим внимание. Путь конфигурирования FPGA части этого SoC’a ориентировочно таков:

1. Создание проекта в IDE фирмы Xilinx
2. Разработка конфигурации
3. Генерация bitstream’а
4. Прошивка

Создание проекта в IDE фирмы Xilinx и разрабокта программы сами по себе займут по статье. Поэтому я возьму готовый проект, который шёл вместе с бордой.

Сперва запускаем проект. Затем запускаем синтез и имплементацию. После генерируем bitstream файл.

Копируем его на борду:

И конфигурируем FPGA:

Ура товарищи! Светодиод горит!

Заметки:
Конфигурировать FPGA, естественно, можно и отладчиком. Только у меня его нет. Vivado очень мощная штука и требует много памяти и ресурсов CPU. На моих i5 и 4GB ОЗУ постоянно свапует.

Также нужно быть внимательным разработчиком, т.к. я слышал несколько историй о том, как жгли камни неправильно настраивая вывода FPGA. Быть может, это невалидно для Zynq.

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Z turn board linux

Linux on Z-Turn board with free HDMI video controller

MYIR released video core for HDMI without time limitation. This guide will provide explanations on how to compile U-Boot, Linux Kernel and add your own peripheral to your Linux design.

Clone git repos

Export hardware and launch SDK

In Vivado: File > Export > Export Hardware > Check Include Bitstream > OK In Vivado: File > Launch SDK

Create FSBL

In SDK: File > New > Application Project Project Name: fsbl OS Platform: standalone HW platform: (select exported platform name**

> Next Select Zynq FSBL > Finish

Import video configuration files into FSBL

in FSBL src, right click import > General > File System.

Select fsbl/src from git folder. And import fsbl_hooks.c display_init/ sii0922_init/

Check Overwrite existing resources without warning. > Finish

Add devicetree_generator to Xilinx SDK

In SDK: SDK Menu: Xilinx > Repositories > New. ( ) > OK

Generate devicetree using Xilinx SDK

In SDK: SDK Menu: File > New > Board Support Package > Under Board Support Package OS, select device_tree > finish

Modify devicetree files for framebuffer

In file system-top.dtsi

in section chosen<> after stdout-path = «serial0:115200n8»; append

In section memory<>, change from reg = ; to reg = ;

Fix bug in devicetree generated files

It seems that Xilinx devicetree generator has a bug, it happens where there are multiple clock-names in a cell.

In file pl.dtsi watch for clock-names

Add usb-otg support in devicetree

In zynq-7000.dtsi replace usb0 entry without

In system-top.dts add phy0 after memory<>

About

Building linux kernel and u-boot for MYIR Z-Turn 7020 Zynq Board

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Z-turn Board

Contents

Overview

The Z-turn Board is designed by MYIR Tech Limited. It is a low-cost and high-performance Single Board Computer (SBC) built around the Xilinx Zynq-7010 (XC7Z010-1CLG400C) or Zynq-7020 (XC7Z020-1CLG400C) All Programmable System-on-Chip (SoC) which is among the Xilinx Zynq-7000 family, featuring integrated dual-core ARM Cortex-A9 processor with Xilinx 7-series Field Programmable Gate Array (FPGA) logic. The board is capable of running Linux and excellent for evaluating and prototyping for Zynq-7000 SoC.

Hardware Features

Mechanical Parameters

• Dimensions: 63mm x 102mm x 1.6mm (8-layer PCB design)
• Power supply: USB power supply or DC 5V/2A
• Working Temp.: 0

Processor

• Xilinx XC7Z010-1CLG400C (Zynq-7010) or XC7Z020-1CLG400C (Zynq-7020) SoC

— 667MHz ARM® dual-core Cortex™-A9 MPCore processor (up to 866MHz)
— Integrated Artix-7 class FPGA subsystem
with 28K logic cells, 17,600 LUTs, 80 DSP slices (for XC7Z010)
with 85K logic cells, 53,200 LUTs, 220 DSP slices (for XC7Z020)
— NEON™ & Single / Double Precision Floating Point for each processor
— Supports a Variety of Static and Dynamic Memory Interfaces

Memory and Storage

• 1GB DDR3 SDRAM (2 x 512MB, 32-bit)
• 16MB QSPI Flash
• TF card interface

Communications

• 1 x 10/100/1000M Ethernet
• 1 x CAN
• 1 x Mini USB2.0 OTG
• 1 x USB-UART debug interface
• 1 x 2.54mm pitch 14-pin JTAG interface

Display

• 1 x HDMI (supports 1080p resolution)

User I/O

Brought out via two 1.27mm pitch 80-pin SMT female connectors

• 90/106 user I/O (7010/7020)
• Configurable as up to 39 LVDS pairs I/O

Others

• Onboard three-axis acceleration sensor and temperature sensor
• 2 x Buttons (1x Reset, 1 x User)
• 4-channel toggle switch
• 5 x LEDs (3 x User LEDs, 1 x Power indicator, 1 RGB LED)
• 1 x Buzzer

Target Applications

• Evaluation and Prototyping for Zynq-7000 AP SoC
• Industrial Automation
• Test & measurement
• Medical Equipment
• Intelligent Video Surveillance
• Aerospace and military

Software Features

Item	Features	Description	Remark
Cross compiler	gcc 4.6.1	gcc version 4.6.1 (Sourcery CodeBench Lite 2011.09-50)
Boot program	BOOT.BIN	First boot program including FSBL, bitstream and u-boot	Source code provided
Linux Kernel	Linux 3.15.0	Customized kernel for Z-turn Board	Source code provided
Drivers	Drivers	USB OTG, Ethernet, MMC/SD/TF, CAN, XYLON LCD, HDMI, Button, UART, LED, GPIO, Buzzer, G-sensor, Temperature Sensor	Source code provided
File System	Ramdisk	Ramdisk system image
File System	Ubuntu Desktop 12.04	Tar file and TF card image file

Function Block Diagram

Dimension Chart

Z-turn IO Cape

Overview

The Z-turn IO Cape is an IO extension board designed specially for the Z-turn Board. User can bring out many peripherals and signals like ADC, GPIO, LCD and camera interfaces to explore more functions from the Z-turn Board.

Features

Dimensions: 102mm x 88mm
Power input: 5V/1A, 3.3V/1A
PS IO: 3.3V
PL IO: 3.3V
ADC input: 0

1.8V
I/O: I/O Function, reused with LCD pins, it can be used as GPIO if don’t use LCD
LCD/Touch screen: Can connect with MYIR’s 4.3-inch and 7-inch LCD Modules
Camera: J2 interface
Pmod: 3 x Pmod interfaces, can be used for connecting with some common Pmod modules
ADC: 1 x ADC (can be differential signals), extended 4 IOs of PS unit

Please refer to FAQ column on MYIR’s website.

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Xillinux: A Linux distribution for Z-Turn Lite, Zedboard, ZyBo and MicroZed

The Xillinux distribution is a software + FPGA code kit for running a full-blown graphical desktop on the Z-Turn Lite, Zedboard and (non-Z7) ZyBo, attaching a monitor, keyboard and mouse to the board itself. Xillinux also supports MicroZed without the graphics.

This is not just a demo, but a kick-start development kit, making integration between the Linux host (PS) and the «FPGA part» (PL) simple, intuitive, and relatively effortless.

NEW: Xillinux is now available for Z-Turn Lite, a cost-effective general-purpose SOM and development board.

A demo configuration of the Xillybus IP core is included in the distribution’s logic. A custom Xillybus IP core can be configured and downloaded at the IP Core Factory.

The full package, along with easy-to-follow setup instructions is free for download from this site. The setup takes 30-60 minutes, the majority of which consists of waiting for Xilinx’ or Altera’s tools to implement some logic components. No prior knowledge in FPGA nor Linux is necessary to carry out the setup process.

• Based upon Ubuntu LTS 16.04 for ARM, it makes the board behave like a PC with the SD card as its hard disk. Just plug a USB mouse and keyboard to the OTG port and use the board like any computer running Linux. Optionally (for Zedboard and ZyBo) connect loudspeakers and microphone to the board’s dedicated plugs, using native sound applications.
• The VGA or HDMI output of the board functions as the computer’s screen output, displaying both a Linux text console and the X-Windows desktop (Gnome).
• Comes with a PL («FPGA») development kit for establishing Xillybus pipes with the host: Connect your application logic to plain FIFOs in the logic part, and use plain file operations to send and receive data. As a matter of fact, for just data acquisition and transmission, Linux’ «cat» command-line utility will do the job. Setting this up requires no knowledge about the processor setup, Linux kernel, drivers etc.
• Also includes the Xillybus Lite kit for a bare-metal-like interface with peripherals.
• Native compilation of user applications and kernel modules on the board: Edit and compile your program on the board’s desktop and processor, rather than using cross-compilers.

Note that MicroZed doesn’t have outputs for sound or graphics, so related features are irrelevant to this board.

(For Z-Turn Lite: There is a separate page on selecting the best fitting pieces of hardware)

• The board itself (Z-Turn Lite, Zedboard, ZyBo, or MicroZed) with their accessories
• A monitor capable of displaying VESA-compliant 1024×768 @ 60Hz with an analog VGA input (i.e. virtually any PC monitor).
• An analog VGA cable for the monitor
• A USB keyboard
• A USB mouse
• A USB hub recognized by Linux 4.4, if the keyboard and mouse are not combined in a single USB plug
• For Zedboard: A type A USB receptacle (female) to USB Micro B plug cable (included in Zedboard’s kit)
• For Zedboard: A reliable SD card with 4GB or more, preferably Sandisk (the one that came with the board should not be used).
• For Z-Turn Lite, ZyBo, and MicroZed: A reliable MicroSD card with 4GB or more, preferably Sandisk.
• Recommended: A USB adapter between an SD/MicroSD card and PC, for writing the image and boot file to the card.

Download

FPGA development board as a USB 3.0 device with the XillyUSB IP core. Read more.

You need to download two items, one for each bullet below. Then please refer to the «getting started» guides in the documentation page.

• Download the boot partition kit for your board: Z-Turn Lite, Zedboard, ZyBo or MicroZed.
• Click here to download the SD card image for Xillinux-2.0.

The instructions for what to do with these files are in the Getting Started guide for Zynq (Zedboard) .

Note: The boot partition kits support Vivado 2016.4 and later.

To view Xillinux’ file system without writing it to a hardware device, loop-mount the SD card image on any Linux machine as follows:

assuming that /mnt/tmp already exists as a directory. Note that the downloaded file must be gunzip’ed first, and that mounting requires root privileges.

All Zynq-related material for download on this page relates to Xillinux-2.0 for Zynq-7000, which was released in February 2018. Support for previous versions is given on this page. Information on the outdated Xillinux for SocKit can be found on this page.

Neither Zybo Z7 nor (non-Lite) Z-Turn boards are supported by Xillinux, and no such support is planned.

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